White Paper

w w w. m r c y. c o m WHITE PAPER 2 Figure 2. Pre-processing The parameters used in this section are introduced in Table 1. Table 1. Pre-processing parameters Pre-processing parameters Nr channels L Nr pulses per CPI P CPI Nr pulses per Doppler processing block P D Samples per pulse before decimation N Decimation factor D Samples per pulse after decimation N D FIR filter length used anti-aliasing in video-to-I/Q K a FFT size (power of 2) used by overlap-save fast con- volution R Convolution length in calibration and pulse compres- sion R cp Number of blocks in the overlap-save fast convolution method B = ND / Rcp B Doppler FFT Size (power of 2) K The number of operations required for the pre-processing is listed in Table 2 Table 2. Pre-processing number of operations Nr Operations Video-to-IQ Demodulation to baseband L * P CPI * 2N Low-pass filter (anti-aliasing using FIR filter) and decimate sample rate L * P CPI * 3K a *N D Array calibration & pulse compression Array calibration and pulse com- pression total L * P CPI * B * (10R * log 2 R + 6R) Forward FFT to get into frequency domain L * P CPI * B * (5R * log 2 R) Multiplications in frequency domain L * P CPI * B * 6R Inverse FFT to return to time domain L * P CPI * B * (5R * log 2 R) Doppler processing L * N D * (5K * log 2 K + 2P D ) Array Calibration Frequency Pulse Compression Video to IQ Decimate Sample Rate Lowpass Filter Demodulate to baseband Doppler Filter Space Time Adaptive Processing (STAP) STAP radar systems adaptively compute weights to reduce the effect of clutter and jamming. Targets in motion relative to the radar will pres- ent a Doppler shift in the returned radar echo. In typical moving target indicator (MTI) radars, this is taken advantage of. However, if the radar platform is in motion, such as in airborne radar systems, then also the ground will present a Doppler shift. In such environments it can be chal- lenging to separate ground clutter from targets. Fortunately, such ground clutter typically provides a similar Doppler shift for the area adjacent to the area being examined. By constructing a filter which will take such an adjacent area into consideration, a STAP system can reduce the effect of ground clutter. With the use of an antenna array and adaptive weights, the STAP system can also adapt the radar antenna pattern by placing nulls in the direction of jammers. Computing the adaptive weights in real-time is an intensive process; computational burden can be reduced by selecting computations most suitable for the processing technology. Even if the most suitable ap- proach is selected for a high-performance multi-channels STAP system, the processing demand can be substantial. As such, previous generation compute solutions were unable to meet size, weight and power (SWAP) requirements, making STAP difficult to deploy. Next generation processor, GPU and FPGA technology enables the de- ployment of effective STAP systems in airborne platforms. While mul- tiple technologies can be used, the technology can greatly affect the programmability, scalability and life-cycle management of the platform. This white paper analyses Xeon server-class processors in airborne STAP systems. It is not an evaluation of current techniques in STAP sci- ence and practice. Instead it is an evaluation of new compute technolo- gies that target this class of processing, while comparing mobile (D) and data-center (E) Xeon processing capabilities. STAP algorithm Figure 1 illustrates the STAP processing blocks. This STAP algorithm is further described by Cain et al. Beam Mb • • • Beam 2 Channel Pulse Time CPI Range Doppler Channel CPI Form Beams (range/doppler) Matrix Factorization Back Substitution W * R = s Steering Vectors, s Beam 1 W = R -1 s Weights Range Doppler Pre-processing Doppler Filter Figure 1. STAP overview The initial stage with pre-processing typically includes Video-to-IQ con- version, array calibration and pulse compression followed by Doppler filtering. The Video-to-IQ conversion usually includes demodulation to baseband, low-pass filtering and decimation of sample rate. These pro- cessing blocks are illustrated in Figure 2.

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