Viewing the flight times versus frequency in Figure 9, there is a flight-time delta of roughly 438 percent during SWM! Any signal spectra
within this bandwidth will experience significant group delay, which may significantly impact the electrical performance of the design.
Especially if group-delay "flatness" is a critical performance parameter.
Mitigating SWM with High Bulk-Resistivity Silicon
The simplest way to mitigate SWM is to utilize a high bulk-resistivity silicon (~1,000 ohms/cm +). With a high bulk-resistivity silicon, the
SWM mode is "pushed down" to a relatively low frequency, which significantly constrains the SWM to a relatively small bandwidth.
Figure 10 depicts the HFSS derived data of the SWM frequency spectrum (signal flight times) versus 1,000 ohm/cm and 10 ohm/cm bulk
resistivity, as well as the respective inductance and capacitance.
Figure 10 augments the reduction in SWM magnitude and bandwidth when utilizing high bulk-resistivity silicon. It also highlights the
magnitude of inductance and capacitance associated with each bulk resistivity.
Figure 9. Viewing the flight times vs. frequency
Figure 10. HFSS™ derived data of the SWM frequency spectrum (signal flight-times)
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