White Paper

w w w. m r c y. c o m WHITE PAPER 1 Redefining Sensor-Edge Processing with 2.5D System-in- Package Technology Over the last 15 years, the proliferation of mobile technology has touched nearly all aspects of our lives. This technology enables us to quickly make decisions by organizing massive data sets and extracting the pertinent information. For example, in only a few seconds, map data is combined with live traffic information, our GPS location, and a database containing open hours to tell us if we will arrive at the restaurant before it closes. Similarly, the 21st century battlefield advantage is information dominance. This requires processing vast quantities of sensor data in near real-time. However, unlike the commercial sector, defense applications do not always have the convenience or connections of sending the data to a remote data center in the cloud. Instead, defense sensors must become smarter and perform the processing at the tactical edge. As today's sensors collect ever-increasing volumes of data, the expectations of edge-processing technology will drastically increase. These broadband processing components must not only be small and rugged, able to function in a fighter jet or on a satellite, but also deliver enough processing power to enable artificial intelligence (AI)-based applications like cognitive electronic warfare (EW). Traditionally, embedded system designers have made tough compromises in the trade-off between physical size and processing power. Usually, this has resulted in significant information loss at both the digitization and processing steps. Advancements in microelectronics technology now provide a new approach to overcoming these challenges. By working at the chip level and leveraging new 2.5D SiP capabilities, designers can combine multiple complex semiconductor dies into a single component while maintaining trust and security. Compared to a monolithic solution, where all the functionality occurs on one type of silicon, heterogeneous SiP technology enables each functional block to be individually optimized. This approach delivers the increased density demanded by the next generation of advanced edge-processing applications. Processing Power and Data Fidelity at the Sensor Edge Today's sensor-based systems are often not operating at their full potential, but rather losing fidelity in data processing, or simply throwing data away due to analog bandwidth limitations from the performance trade-offs required to meet size, weight, and power (SWaP) constraints. In addition, the most effective radar and EW response techniques demand extremely low latency as the signal transitions from analog RF to digital and back to RF. A widely deployed application is EW radar spoofing, where embedded components detect, alter, and then replay radar pulses to create false targets. This only works when the latency is so low the original emitter radar system cannot perceive a time lag in the replayed pulse. Rapid pulse detection and response is also dependent on a high spectral density spread across multiple channels, making broadband operation just as critical as low latency. Emerging multifunction active electronically scanned array (AESA) technology (see Figure 6) demands broadband, compact, and powerful embedded processing to dynamically shift from surveillance of long- range threats to tracking and jamming short-range targets. Traditional monolithic solutions lack the required performance, while surface- mount technology (SMT) solutions are too large to embed behind each AESA tile. Another still-evolving low-latency application arena is cognitive EW, which uses AI to identify new patterns in detected data and develop an appropriate response in near-real time. Success requires low- latency, data center-grade processing in a small form factor rugged enough for the tactical edge. Future technologies will make still further demands on low-latency signal acquisition and digital processing. Hypersonic weapons, moving at speeds of Mach 5 or greater, are the next wave of threats. To counter them, defense systems will require powerful levels of low- latency AI processing sensors on a wide range of platforms, including satellite deployments. For these applications, moving data from the sensor to a centralized computing resource limits both data fidelity and latency. The current generation of sensors create data bandwidths that overwhelm the RF front ends and system-level interconnects, forcing substantial data reduction before processing. The interconnects also introduce transmission times that make sophisticated, low-latency radar and EW responses difficult or impossible. Figure 1: Mercury's system-in-package (SiP) device, designed to overcome size, weight, and power (SWaP) challenges, is not much larger than the size of a quarter. Figure 2: Low-latency edge processing deceiving the targeting radar from enemy missile attack.

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