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COTS5GDvlpmnt

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WHITE PAPER COTS Software Defined Radio for 5G Development mrcy.com 4 Figure 2b Each SDR board includes a precision timing system with a multi-bit, fractional synthesizer for variable sampling rates locked to an on-board OCXO, or a reference input signal (see Figure 2b). These timing systems usually accept external synchronization signals from a Network Time Protocol (NTP) server or GPS receiver for the highly precise timing requirements of a radar or cellular system. The precision is also required for phase coherent sampling of the A/Ds, FPGA DSP data synchronization, and D/A signal transmission. > RF Coaxial Connectors > FMC Connector XMC Mezzanine Card Functional Block Diagram The XMC example A/D has a 200 MSPS maximum sampling rate that can capture a 100 MHz Nyquist BW excluding filtering. A common technique with digital radio is to acquire channel information, or intermediate frequency (IF) BW by under-sampling the signal. Figure 3 and text below explain the "the Fan-fold" concept using multiple Nyquist zones.

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