mrcy.com
CHIPLETIZED ARCHITECTURES
Revolutionizing microelectronics
with chipletized architectures
CHIPLETIZED ARCHITECTURES
A flexible design approach integrates individual
intellectual property (IP) blocks called chiplets.
The IP in a chiplet performs a specific function, such as
RF capture and transmission or low-latency processing.
Each chiplet is an individual semiconductor device, highly optimized
for its specific function. 2.5D heterogeneous integration (HI) allows
the designer to select chiplets and combine them to achieve the
optimal solution for the intended use case.
Benefits of a chiplet-based architecture
Chiplets are a generational advancement for microelectronics that enables defense
programs to utilize the newest novel semiconductors. By improving reuse, chiplets
decrease the design cost for defense programs compared to legacy approaches.
▪ Reduces design timeline
▪ Lower design and production costs compared to legacy monolithic ASIC technology
▪ Re-use of chiplets enables defense programs to benefit from commercially
designed chiplets
▪ Chiplets meet pressing DoD missions such as EW, radar, security and sensor
processing (particularly RF bandwidth and latency)
▪ Physical size can be reduced by 70%, enabling future attritable systems to
perform missions that require manned platforms today
Getting more with 2.5D SiP
Mapping easily into combinations of IP chiplets, the 2.5D SiP offers additional
benefits meeting sense-edge processing requirements.
▪ Achieve required mix of CPUs, GPUs and FPGAs with flexible designs
▪ Combine the digital processing chain with transceivers and ADC/DAC components
using a single SiP
TECHNOLOGY HIGHLIGHT
Pioneering this agile approach is
the RFS1140—an RF SiP designed,
developed and manufactured in the
U.S. in a DMEA-accredited facility.
Offering direct digitization and
high-speed processing, the RFS1140
contains a Versal® FPGA, high-
speed data converter at 64 GSPS,
and integrated power and memory
for an advanced solution to sensor
processing at the edge.
Read more:
mrcy.com/RFS1140
Reusable
chiplets and designs
Lower cost
compared to monolithic ASIC
70%
SWaP savings