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SPACE TECHNOLOGY SPECIAL REPORT SEPTEMBER 2026 11 The root cause is not a demand blip but a wafer allocation shift. High-bandwidth memory, the stacked DRAM feeding AI accelerators, consumes roughly three times the wafer capacity per bit of conventional DRAM. The penalty comes from three places: through silicon vias occupy die area, stacking eight to twelve thinned die multiplies yield loss, and the advanced packaging that assembles the stacks is capacity constrained. Industry estimates put HBM at about 22 percent of total DRAM wafer starts in 2026 while delivering only about 9 percent of industry bit supply. With HBM commanding a per-bit premium several times that of commodity DRAM, every legacy wafer start now carries an opportunity cost that suppliers are no longer willing to pay. Legacy die are not being retired because they are unprofitable. They are being retired because everything else is more profitable. Why Space Absorbs the Worst of It Every long-lifecycle industry suffers when suppliers exit legacy nodes, but space is uniquely exposed for one reason: radiation qualification is bound to a specific die revision built in a specific fab. Total ionizing dose response, single event latchup thresholds, upset cross sections, and functional interrupt behavior are all functions of cell geometry, process, and layout. NASA parts engineering guidance is blunt on this point: a die revision or die shrink produces what is effectively a new part, requiring fresh screening, qualification, and radiation testing. A fab transfer breaks the pedigree the same way, even when the design is nominally unchanged. This collides with cadence. Commercial memory turns over a die generation every 18 to 24 months. A spacecraft program runs 5 to 15 years from design start to end of mission, longer for deep space. A memory device selected and characterized during design can be end-of-life before the first flight unit ships. The diminishing manufacturing sources problem that the defense world has managed for decades has gone from a trickle of notices to a flood, and the stakes of mismanaging any single notice are high: the Defense Microelectronics Activity has estimated that one unmanaged obsolescence incident can cost up to $2.4 million and 64 weeks to resolve. Requalification capacity is the second bottleneck. More than 90 percent of U.S. heavy-ion beam hours for single- event effects testing come from just two facilities, the Texas A&M University Cyclotron Institute and the 88-inch cyclotron at Lawrence Berkeley National Laboratory, which together provide on the order of 5,000 to 5,600 beam hours per year. When an industry-wide wave of end-of-life notices pushes dozens of programs toward simultaneous requalification, fixed beam capacity becomes the schedule driver. No single countermeasure resolves this. What works is a layered posture built from four disciplines. Discipline 1: Die-Agnostic Architecture The most durable defense is architectural. Memory subsystems can be designed so that the controller, the error correction, and the host interfaces do not assume any single die generation or vendor. In a solid-state data recorder, that typically means a reprogrammable radiation-tolerant FPGA controller rather than a hard ASIC, memory organized into independently controlled and independently powered banks, and error correction implemented as a configurable pipeline rather than as logic tuned to one device's error signature. The payoff is containment. When a die goes end-of-life, a die-agnostic design confines the change to device-level requalification: radiation characterization of the new die plus retuning of ECC and interface timing, rather than a board respin and full system requalification. The tradeoffs deserve honest accounting. Error correction genuinely does need retuning for each die, because raw bit error rates and dominant failure modes differ across generations. Radiation response must be recharacterized for every new die regardless of architecture, since no controller can inherit a pedigree the silicon does not have. And FPGA- based controllers carry power and performance penalties relative to hard ASICs. What the architecture buys is not freedom from requalification but a much smaller, faster, and cheaper requalification, plus the option to source across vendors. It fits best on products that expect multiple build lots over a long production life. Discipline 2: Rolling Qualification The second discipline is temporal: qualify the successor before it is needed. A rolling qualification pipeline continuously characterizes next- generation die in parallel with production, so that when the incumbent's end-of-life notice arrives, a flight-ready alternative already has radiation data behind it. The costs are real and recurring: engineering samples, test fixtures, and above all beam time, which must now be booked far in advance given facility backlogs. The economics generally close only when qualification cost is amortized across a product line or a constellation rather than absorbed by a single program. The alternative, however, is reactive qualification under schedule pressure, competing for the same scarce beam hours as every other program responding to the same notice. Operators of proliferated constellations hold a structural advantage here: frequent build lots create natural insertion points for newly qualified die, so the pipeline output flows directly into production rather than sitting on a shelf. Discipline 3: Last-Time-Buy Discipline When a pedigreed part cannot be replaced in time, the remaining move is to buy the future: a last-time buy sized to bridge a transition, or a lifetime buy sized to carry a program through end of production and sustainment. Sizing is a constrained forecasting problem. Overbuying ties up capital and ends in scrap. Underbuying forces exactly the redesign the buy was meant to avoid. Memory adds carrying costs that generic obsolescence planning tends to miss. Stored devices need

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