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TS001-1.0.4 LoRaWAN® L2 1.0.4 Specification

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LoRaWAN ® L2 1.0.4 Specification © 2020 LoRa Alliance ® Page 32 of 90 The authors reserve the right to change specifications without notice. 993 The LinkADRAns Status bits have the following meaning: 994 995 Bit=0 Bit=1 ChannelMaskACK The channel mask enables a yet undefined channel or the channel mask required all channels to be disabled or the channel mask is incompatible with the resulting data rate or TX power. The command was discarded, and the end- device state was not changed. The channel mask sent was successfully interpreted. All currently defined channel states were set according to the mask. DataRateACK The data rate requested is unknown to the end-device or is not possible, given the channel mask provided (not supported by any of the enabled channels). The command was discarded, and the end-device state was not changed. The data rate was successfully set. PowerACK The end-device is unable to operate at or below the requested power level. The command was discarded and the end- device state was not changed. The power level was successfully set. Table 23: LinkADRAns Status bits signification 996 997 If any of those three bits equals 0, the command did not succeed, and the end-device SHALL 998 keep its previous state. 999 5.3 End-Device Transmit Duty Cycle (DutyCycleReq, DutyCycleAns) 1000 End-devices and Network Servers SHALL implement these commands. 1001 The DutyCycleReq command can be used by the Network to limit the maximum aggregated 1002 transmit duty cycle of an end-device. The aggregated transmit duty cycle corresponds to the 1003 transmit duty cycle over all sub-bands. 1004 1005 Size (octets) 1 DutyCycleReq payload DutyCyclePL Table 24: DutyCycleReq payload format 1006 1007 1008 Bits 7:4 3:0 DutyCyclePL RFU MaxDutyCycle 1009 Table 25: DutyCyclePL field format 1010 1011 1012 1013 1014 1015

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